Abstract:Three-level inverters have the advantages of low voltage stress in power devices and low harmonic content in bridge leg output voltage. They are widely used in high-pressure applications. In order to avoid the problem of direct connection on the DC side, dead-time is necessary to add in the drive signals of the power switches. Dead-time not only introduces additional low-frequency harmonics, but also exacerbates the imbalance of DC side capacitors. The reliability of inverter operation will be affected. This paper proposes a three-level inverter with a center-tapped inductor. The inductor serves both anti direct connection and filtering purposes. Thus the inverter can avoid direct connection problem from the topology. Also the inverter constructs a freewheeling path to avoid sudden changes of the inductor current. The corresponding three-level modulation strategy of the proposed inverter is studied. The consistency between the proposed inverter and traditional three-level inverter is analyzed. On the basis, the filtering and anti direct connection effects are discussed through the equivalence of the center-tapped inductor. The topological advantages of achieving capacitor balance is analyzed. Finally, the correctness of the theoretical analysis was verified through simulation and experiments.